What IT Do & How IT Do IT—DDR5 Double Data Rate 5—Synchronous Dynamic Random-Access Memory

Double Data Rate 5 Synchronous Dynamic Random-Access Memory or DDR5 is the current standard for memory module

Double Data Rate 5 Random-Access Memory or DDR5 is the current standard for memory modules on consumer PCs. DDR5 came to market in concert with Intel's 12th Generation Core processors (headed by the Core i9-12900K) and associated Z690-chipset motherboards. Motherboards using the Z690 chipset are the first consumer boards to support DDR5 memory modules and Alder Lake chips.

Development of DDR5 lies mainly with its increased capacity of 64Gb (gigabits) per integrated circuit (IC) or the chips on the memory modules. This represents a fourfold increase compared to DDR4. Previous generations of DDR memory have typically doubled capacity compared with their predecessors. The quadrupling of maximum IC capacity brings with it DIMMs of up to 128GB per DDR5 module. The typical four-slot DDR4 desktop motherboard can hold up to 128GB of memory in total using four 32GB consumer DIMMs, but DDR5 expands that to an incredible 512GB on four-slot boards that support that peak amount. The standard was released on July 14, 2020.
 

What IT Do
DDR5 is a type of synchronous dynamic random-access memory. DDR5 was planned to reduce power consumption, while doubling bandwidth.  A new feature called Decision Feedback Equalization (DFE) enables input/output (I/O) speed scalability for higher bandwidth and performance improvement. DDR5 has about the same latency (around 14 ns) as DDR4 and DDR3. DDR5 produces 8 times the maximum DIMM capacity from 64 GB to 512 GB. DDR5 also has higher frequencies than DDR4, up to 8GT/s which translates into 64 GB/s (8000 MT/s * 64-bit width / 8 bits/byte = 64 GB/s) of bandwidth per DIMM.

DDR5 chips have on-die error correction code (ECC), where errors are detected and corrected before sending data to the CPU. However, this isn't the same as true ECC memory with extra data correction chips on the memory module. DDR5's on-die error correction is to improve reliability and to allow denser RAM chips which lowers the per-chip defect rate. There still exist non-ECC and ECC DDR5 DIMM variants; the ECC variants have extra data lines to the CPU to send error-detection data, letting the CPU detect and correct errors occurring in transit.

Each DDR5 DIMM has two independent channels. Earlier DIMM generations featured only a single channel and one Command/Address (CA) bus controlling the whole memory module with its 64 (for non-ECC) or 72 (for ECC) data lines. Both subchannels on a DDR5 DIMM each have their own CA bus, controlling 32 bits for non-ECC memory and either 36 or 40 data lines for ECC memory, resulting in a total number of either 64, 72 or 80 data lines. The reduced bus width is compensated by a doubled minimum burst length of 16, which preserves the minimum access size of 64 bytes, which matches the cache line size used by modern x86 microprocessors.

How IT Do IT

Compared to DDR4, DDR5 further reduced memory voltage to 1.1 V, thus reducing power consumption. DDR5 modules incorporate on-board voltage regulators in order to reach higher speeds. There is a common expectation that most use-cases that currently use DDR4 will ultimately migrate to DDR5. Consumer DDR5 was initially limited to Intel’s new LGA 1700 socket ("Alder Lake") platform, with separate developments in the data center and server sector focused on registered DIMMs.

Multiple DDR5 memory chips mounted on a circuit board form memory modules. For personal computers and servers, DDR5 memory is usually supplied in 288-pin dual in-line memory modules, more commonly known as DIMMs. There are multiple DIMM variants available for DDR5

Unbuffered memory modules (UDIMMs) directly expose the memory chip interface to the module connector. Load-reduced or registered variants (LRDIMMs/RDIMMs) use additional active circuitry on the memory module to buffer the signals between the memory controller and the DRAM chips and this  reduces the capacitive load on the DDR5 bus.

DDR5 RDIMMs/LRDIMMs use 12 V and UDIMMs use 5 V input. In order to prevent damage by accidental insertion of the wrong memory type, DDR5 UDIMMs and LRDIMMs are not mechanically compatible. Additionally, DDR5 DIMMs are supplied with management interface power at 3.3 V, and use on-board circuitry (a power management integrated circuit and associated passive components) to convert to the lower voltage required by the memory chips. Thus ending voltage regulation close to the point of use which provides more stable power, and echoes the development of voltage regulator modules for CPU power supplies.

Processors with DDR5

Intel Core i9	Core i9 14900K, 14900KF, 13900KS, 13900K, 13900KF, 13900F, 13900T, 13900, 12900KS, 12900K, 12900KF, 12900F, 12900, 12900T
Intel Core i7	Core i7 14700K, 14700KF, 13700K, 13700KF, 13700T, 13700F, 13700, 12700K, 12700KF, 12700F, 12700, 12700T
Intel Core i5	Core i5 14600K, 14600KF, 13600K, 13600KF, 13600T, 13600, 13500T, 13500, 13400T, 13400F, 13400, 12600K, 12600KF, 12600, 12600T, 12500, 12500T, 12400F, 12400, 12400T
Intel Core i3	Core i3 13100F, 13100, 12300, 12300T, 12100, 12100F, 12100T
Intel Pentium Gold	Pentium Gold G7400, G7400T
AMD	EPYC 9004 processors Ryzen 7000-series